# Memristors for brain-inspired computing: the synapse and its electronic twin

> A mirrored graphical abstract: the biological synapse on the left, the memristor on the right, and a central spine that pairs them row by row. Synaptic strength maps to conductance, spike-timing learning to voltage pulses, and a neural network to a crossbar array that multiplies in memory.

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- Updated: 2026-10-14
- Category: Materials graphical abstracts
- Method: Graphical abstract
- Starting materials: A biological synapse whose strength changes with activity
- Product: A two-terminal memristor whose conductance plays the synaptic weight, in crossbars that compute in memory
- Key result: Spike-timing window 20 ms either way (Bi & Poo 1998); 16,520 analog conductance levels, 14-bit, in a molecular memristor (Sharma et al. 2024); more than 96% MNIST accuracy for a five-layer memristor CNN on eight 2,048-cell arrays (Yao et al. 2020)
- Figure: 1920 × 1080 px, 113 editable layers (2 generated objects with settings)

## Steps

1. **Synaptic strength ↔ conductance**: A spike makes vesicles release transmitter in under a millisecond (Südhof 2013) and a synapse can be persistently strengthened or weakened (Bi & Poo 1998); a memristor is a conductor/oxide/conductor stack whose resistance, set by ion motion and a filament that forms or dissolves, remembers its history (Yang et al. 2013; Kumar et al. 2016)
2. **Learning ↔ pulses**: Post spiking within 20 ms after pre gives LTP, within 20 ms before gives LTD (Bi & Poo 1998); voltage pulses tune a memristor’s conductance, and memristor synapses show spike-timing-dependent plasticity (Jo et al. 2010)
3. **Neural network ↔ crossbar array**: Network computation rests on synapses and connectivity (London & Häusser 2005); a crossbar with a memristor at every crosspoint does the vector–matrix product by Ohm’s and Kirchhoff’s laws, I = Σ G·V (Mahmoodi et al. 2019; Xia & Yang 2019)

## Uses

- Graphical abstracts on neuromorphic hardware
- Talks and posters on memristors and in-memory computing
- Teaching the synapse–memristor analogy

## References

1. Strukov, Snider, Stewart & Williams, “The missing memristor found”, Nature 2008. https://doi.org/10.1038/nature06932 (method origin)
2. Jo et al., “Nanoscale memristor device as synapse in neuromorphic systems”, Nano Lett. 2010. https://doi.org/10.1021/nl904092h (primary)
3. Bi & Poo, “Synaptic modifications in cultured hippocampal neurons: dependence on spike timing, synaptic strength, and postsynaptic cell type”, J. Neurosci. 1998. https://doi.org/10.1523/JNEUROSCI.18-24-10464.1998 (primary)
4. Kumar et al., “Conduction channel formation and dissolution due to oxygen thermophoresis/diffusion in hafnium oxide memristors”, ACS Nano 2016. https://doi.org/10.1021/acsnano.6b06275 (primary)
5. Prezioso et al., “Training and operation of an integrated neuromorphic network based on metal-oxide memristors”, Nature 2015. https://doi.org/10.1038/nature14441 (primary)
6. Mahmoodi, Prezioso & Strukov, “Versatile stochastic dot product circuits based on nonvolatile memories for high performance neurocomputing and neurooptimization”, Nat. Commun. 2019. https://doi.org/10.1038/s41467-019-13103-7 (primary)
7. Yao et al., “Fully hardware-implemented memristor convolutional neural network”, Nature 2020. https://doi.org/10.1038/s41586-020-1942-4 (primary)
8. Sharma et al., “Linear symmetric self-selecting 14-bit kinetic molecular memristors”, Nature 2024. https://doi.org/10.1038/s41586-024-07902-2 (primary)
9. Yang, Strukov & Stewart, “Memristive devices for computing”, Nat. Nanotechnol. 2013. https://doi.org/10.1038/nnano.2012.240 (review)
10. Xia & Yang, “Memristive crossbar arrays for brain-inspired computing”, Nat. Mater. 2019. https://doi.org/10.1038/s41563-019-0291-x (review)
11. Südhof, “Neurotransmitter release: the last millisecond in the life of a synaptic vesicle”, Neuron 2013. https://doi.org/10.1016/j.neuron.2013.10.022 (review)
12. London & Häusser, “Dendritic computation”, Annu. Rev. Neurosci. 2005. https://doi.org/10.1146/annurev.neuro.28.061604.135703 (further reading)

Credit: Drawn by LabCanvas after Strukov et al., Nature 2008 (doi:10.1038/nature06932); Bi & Poo, J. Neurosci. 1998 (doi:10.1523/JNEUROSCI.18-24-10464.1998); Mahmoodi et al., Nat. Commun. 2019 (doi:10.1038/s41467-019-13103-7); Yao et al., Nature 2020 and Sharma et al., Nature 2024.

## Questions

**What does the “Memristors for brain-inspired computing: the synapse and its electronic twin” template show?** A mirrored graphical abstract: the biological synapse on the left, the memristor on the right, and a central spine that pairs them row by row. Synaptic strength maps to conductance, spike-timing learning to voltage pulses, and a neural network to a crossbar array that multiplies in memory.

**What are the steps shown in “Memristors for brain-inspired computing: the synapse and its electronic twin”?** 1. Synaptic strength ↔ conductance: A spike makes vesicles release transmitter in under a millisecond (Südhof 2013) and a synapse can be persistently strengthened or weakened (Bi & Poo 1998); a memristor is a conductor/oxide/conductor stack whose resistance, set by ion motion and a filament that forms or dissolves, remembers its history (Yang et al. 2013; Kumar et al. 2016). 2. Learning ↔ pulses: Post spiking within 20 ms after pre gives LTP, within 20 ms before gives LTD (Bi & Poo 1998); voltage pulses tune a memristor’s conductance, and memristor synapses show spike-timing-dependent plasticity (Jo et al. 2010). 3. Neural network ↔ crossbar array: Network computation rests on synapses and connectivity (London & Häusser 2005); a crossbar with a memristor at every crosspoint does the vector–matrix product by Ohm’s and Kirchhoff’s laws, I = Σ G·V (Mahmoodi et al. 2019; Xia & Yang 2019).

**What are the starting materials and the product?** Starting materials: A biological synapse whose strength changes with activity. Product: A two-terminal memristor whose conductance plays the synaptic weight, in crossbars that compute in memory.

**Which papers is “Memristors for brain-inspired computing: the synapse and its electronic twin” based on?** Strukov, Snider, Stewart & Williams, “The missing memristor found”, Nature 2008 (doi:10.1038/nature06932); Jo et al., “Nanoscale memristor device as synapse in neuromorphic systems”, Nano Lett. 2010 (doi:10.1021/nl904092h); Bi & Poo, “Synaptic modifications in cultured hippocampal neurons: dependence on spike timing, synaptic strength, and postsynaptic cell type”, J. Neurosci. 1998 (doi:10.1523/JNEUROSCI.18-24-10464.1998); Kumar et al., “Conduction channel formation and dissolution due to oxygen thermophoresis/diffusion in hafnium oxide memristors”, ACS Nano 2016 (doi:10.1021/acsnano.6b06275); Prezioso et al., “Training and operation of an integrated neuromorphic network based on metal-oxide memristors”, Nature 2015 (doi:10.1038/nature14441); Mahmoodi, Prezioso & Strukov, “Versatile stochastic dot product circuits based on nonvolatile memories for high performance neurocomputing and neurooptimization”, Nat. Commun. 2019 (doi:10.1038/s41467-019-13103-7); Yao et al., “Fully hardware-implemented memristor convolutional neural network”, Nature 2020 (doi:10.1038/s41586-020-1942-4); Sharma et al., “Linear symmetric self-selecting 14-bit kinetic molecular memristors”, Nature 2024 (doi:10.1038/s41586-024-07902-2); Yang, Strukov & Stewart, “Memristive devices for computing”, Nat. Nanotechnol. 2013 (doi:10.1038/nnano.2012.240); Xia & Yang, “Memristive crossbar arrays for brain-inspired computing”, Nat. Mater. 2019 (doi:10.1038/s41563-019-0291-x); Südhof, “Neurotransmitter release: the last millisecond in the life of a synaptic vesicle”, Neuron 2013 (doi:10.1016/j.neuron.2013.10.022); London & Häusser, “Dendritic computation”, Annu. Rev. Neurosci. 2005 (doi:10.1146/annurev.neuro.28.061604.135703).

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